JP1 Remotes

Kevin Timmerman

CP2101 and CP2102 do not work. They don't allow control the the TxD line.

http://www.hifi-remote.com/forums/viewt ... 933#104933

Kevin Timmerman

dongle: why is it bad?
do you prefer this one?
http://www.compendiumarcana.com/iraudio/led_2b.png
With this design the voltage is doubled but drives 2 leds.
In the design I proposed, the voltage is normal but each channel drives a led.
So, since the leds are inverted in polarity, a mono WAV ...

Kevin Timmerman

Very nice program, but please include another mode.
I see left and right channels are phase inverted.
This can work with single led audio jack.

Phase inversion and 2 LEDs are required for proper operation. The theory is explained here: http://www.compendiumarcana.com/iraudio

I used a dual ...

Kevin Timmerman

Here are all the codes in ict format and the C++ source that created them:

http://www.compendiumarcana.com/forumpics/gwts_ict.zip

Kevin Timmerman

Try this - it should send the blue command. If it works I will do all the other 3 byte codes.

Code: Select all

irscope 0
carrier_frequency 38005
sample_count 12
+2085
-417
+834
-834
+417
-417
+1668
-834
+417
-417
+1668
-2502

Kevin Timmerman

OK, the receiver is probably a 38 kHz version rather than the wide band. IRDA modules look quite different, have tx/rx in one module and have rather short range.

The IR Widget capture posted by jward is certainly not IRDA. It has a ~38 kHz carrier. There are approximately 15.78 carrier cycles per ...

Kevin Timmerman

Thanks. Some else working on the ears on the DIY Christmas forum posted this exact same algorithm last night as the Maxim/Dallas's 1-Wire CRC-8. Does one just recognize this from years of experience?

Checksums, yes, could see that it was not a checksum. Had to write some code to test the popular ...

Kevin Timmerman

jward wrote:I brute-forced the checksums to make them work

Code: Select all

uint8_t gws_crc(uint8_t *d, unsigned len)
{
    crc = 0;
    while(len--) {
        crc ^= *d++;
        unsigned n = 8; do crc = (crc & 1) ? (crc >> 1) ^ 0x8C : crc >> 1; while(--n);
    }
    return crc;
}

Kevin Timmerman

That's exactly what I want to do - use one of the 16 bit timers on the PIC18F, but servicing the data output at a sample rate of 100 uS when using the USB firmware might pose challenges (aka, "I never did this before at this rate").

However, the pic18f2550, does have a 256 bytes Data EEPROM, and ...

Kevin Timmerman

There where horrible bugs in bit-bang mode on the R series chips. The new X series is much better, but still not perfect.

IIC, SPI and similar are usually not a problem as long as exact timing is not required.

I tried IR capture with bit-bang mode about 6 or 7 years ago and it was not usable.

Kevin Timmerman

It seems you used a bootloader, as that's the only way the firmware could be updated on the fly. In the design I have planned, I will use a modified MCHPUSB bootloader.

I had some clarifications about the pulse count mode of the IRWidget, but perhaps for you, it will be easier to have a look at ...

Kevin Timmerman

I don't think anyone has had success with the CP2101/CP2102

The CP2101 doesn't support break. The CP2102 does, but is seems to be broken.

http://www.hifi-remote.com/forums/viewt ... 933#104933

Kevin Timmerman

I built a prototype JP1 EE / JP1 Flash / IR Widget combo device about 4 years ago. The JP1 serial protocol was extended to support JP1 EEPROM and IR Widget operation. Firmware could be updated via USB. Tommy wasn't interested in mfg it, so no more work was done on it.

The JP1 EEPROM adapter was ...

Kevin Timmerman

The IR receiver module would typically be connected to a timer/counter unit input. That allows the exact time of a rising and/or falling edge to be captured and an interrupt triggered conditionally. For some protocols such as Sony and RC5/6 it is necessary to know the time of both edges, for NEC and ...

Kevin Timmerman

The JP1.1, 1.2 and 1.3 remotes require the TxD line to be held in a break state during initialization of communication. Here is a logic analyzer capture of a FT230X chip beginning JP1.x communication. Note the two ~100 ms break conditions.

http://www.compendiumarcana.com/jp1flash/jp1_ftdi.jpg ...

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